Company : Synopsys
Website : www.synopsys.com
Eligibility : Bachelor’s / Master's degree
Experience : Freshers
Location : Bangalore
Job Role : Intern Position
Desired Profile :
The focus of work would be in one of the following areas:USB2/USB3/Ethernet
The nature of work would be on the following lines:
Architecture exploration of the sub-blocks within one of these IPs to optimize for area, speed and power
VLSI Design & verification of these sub-blocks/exploration of latest features and standards
Requirements:
HDL Languages coding experience preferably in Verilog/Vera/System Verilog is preferable.
The candidate must have completed Bachelors degree in electronics/ Electrical engg. Partial completion of MS/MTech preferable
Website : www.synopsys.com
Eligibility : Bachelor’s / Master's degree
Experience : Freshers
Location : Bangalore
Job Role : Intern Position
Desired Profile :
The focus of work would be in one of the following areas:USB2/USB3/Ethernet
The nature of work would be on the following lines:
Architecture exploration of the sub-blocks within one of these IPs to optimize for area, speed and power
VLSI Design & verification of these sub-blocks/exploration of latest features and standards
Requirements:
HDL Languages coding experience preferably in Verilog/Vera/System Verilog is preferable.
The candidate must have completed Bachelors degree in electronics/ Electrical engg. Partial completion of MS/MTech preferable
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2 comments:
Really great job vacancy. Thank you for this post.
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